A Fast Self-Jamming Cancellation Architecture and Algorithm for Passive RFID Sensor System

Abstract

In this letter, we propose a fast self-jamming cancellation (SJC) architecture for Ultra High Frequency (UHF) radio-frequency identification (RFID) interrogators. The core SJC architecture includes a Field Programmable Gate Array (FPGA) as the RFID baseband processor, a radio frequency (RF) agile transceiver which has two transmitting ports as the RF front-end, and a combiner. By detecting the amplitude and phase of the interference carrier, the SJC algorithm transmits a suppression carrier through the second transmitting port of the agile RF transceiver. The suppression carrier could effectively suppress the self-jamming carrier without designing complex circuits. Our test results showed the isolation between the transmitting and receiving port achieves 100dB at UHF band, and the cancellation processes can be finished within 0.4ms.

Xu (Eric) Wang

Ph.D. Candidate

My research interests include computer networks, complex networks, and edge computing.